Logic Gate Truth Tables:

AND gate
Input
 A  		Input
 B  		Output
   
0 0 0
1 0 0
0 1 0
1 1 1
NAND gate
Input
 A  		Input
 B  		Output
   
0 0 1
1 0 1
0 1 1
1 1 0
OR gate
Input
 A  		Input
 B  		Output
   
0 0 0
1 0 1
0 1 1
1 1 1
NOR gate
Input
 A  		Input
 B  		Output
   
0 0 1
1 0 0
0 1 0
1 1 0
XOR gate
Input
 A  		Input
 B  		Output
   
0 0 0
1 0 1
0 1 1
1 1 0
XNOR gate
Input
 A  		Input
 B  		Output
   
0 0 1
1 0 0
0 1 0
1 1 1